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Spent all day evaluating ByteLink versus RapidIO, and I've come to the conclusion that I can't really do much better than RapidIO.

Hat's off to the RapidIO development folks. This is a *wickedly* well-designed protocol stack.

I still might not end up using it for the #Kestrel3 only because of LUT limitations in the FPGA, but hot dang, if I had a bigger chip to play with, I'd be using it right out of the box.