Conversation

With each passing day, and each day I don't work on my KCP53010 processor design, I yearn ever more for going back to a simple stack architecture CPU.

RISC-V is nice, but holy hell is it complicated to implement. Even a ridiculously simple implementation requires many thousands of lines of Verilog. nMigen is helping, but not by much.

A functional stack CPU can be implemented in as little as 2000 LOC of Verilog, and that's really pushing things.