Notices by Vertigo (vertigo@mastodon.social), page 22

@uranther @kinsey @sireebob @dogoken In remote regions of the world, Internet traffic does, indeed, travel by foot. People have bus routes, and they equip the buses with wifi routers. Remote towns accumulate packets until a bus w/ wifi arrives, and offloads traffic at that time.

You need specialized client software to make this work (more like BBSes or UUCP back in the day), but apparently folks do use it today. I hadn't known.

@djsundog Then there is hope for the Kestrel project. I got Kestrel-2DX working in 2017. Maybe 2018 will be the year of the Kestrel-3!

@garbados @djsundog @iximeow @er1n Although, it's just occurred to me: if we're replicating the whole stack down to sand, we're going to want to repro FOSH RAM as well, which means we won't have as much in the way of density. RISC-V C-extensions compete well with 68K and ARM Thumb, but to get REALLY dense code, Forth engines are where it's at.

And I happen to have experience in that field as well. :)

@djsundog Nooooo!!! You don't want that! That will utterly kill any market incentives to support USB, Thunderbolt, and all the other I/O standards that you need to pay $10000/year OR MORE to participate with.

(I'm not even joking. Even RapidIO requires a very expensive membership if you want a vendor ID to use for yourself. However, I've found a way around that via a gaping loop-hole, which RapidIO knows about and surprisingly never asked me to NOT disclose it.)

@bob @suetanvil @jjg @h @Antanicus Organization of Concerned Anarchists (sorry, low hanging fruit. ;) )

Software should be gauged relative to 0 dBy, the reference amount of yak shaving to get anything done.

@djsundog I'm working on it, I'm working on it!!

(Well, *one* platform, at least.)

@h @bob @wakest Some inspiration for consideration: http://modulatedlight.org/optical_comms/optical_index.html

Achievement unlocked!! #FPGA https://pastebin.ca/3947098

This is my very first FPGA core written in the Chisel 3 DSL. This is a remake of the Kestrel-2's GPIA general purpose interface adapter.

The GPIA-2:
- is Wishbone 1.4 Pipeline compliant.
- fixes the GPIA bug where byte writes corrupts the opposing byte of the output port.

Achievement unlocked!! https://pastebin.ca/3947098

This is my very first FPGA core written in the Chisel 3 DSL. This is a remake of the Kestrel-2's GPIA general purpose interface adapter.

The GPIA-2:
- is Wishbone 1.4 Pipeline compliant.
- fixes the GPIA bug where byte writes corrupts the opposing byte of the output port.

@EdS There's a surprisingly large amount of interest, at least on a casual level, here on the Fediverse. Also, Forth.

Both of these pleases me greatly.

Just had a *nice* conversation here on Mastodon about Unicode and its good and bad points. Everyone's view is different. Though we were in bulk agreement over bulk issues, revealing the finer details was enlightening, but also enjoyable.

You just don't get this on any other social media site today. Once again, I find myself thankful that the #Fediverse exists, and that I can participate on it, with it, and through it.

@ajroach42 @staticsafe You're *so* close.

The failure to roll out IPv6 was more due to ISPs simply not wanting to sink investment in upgrading their infrastructure until the very last minute, and not so much due to malice. Malice came later once opportunists saw how they could exploit their new-found scarcity.

The ability of the Internet to "route around failures" is fundamentally predicated on the end-to-end argument being valid. You cannot have true E2E as long as you must depend on NAT.

@clacke @natecull

most language complexity arises out of what you might call folkways.

to the extent unicode represents existing natural language, I'm down.

to the extent it grows in disparate directions to sell phones, not so much.

this is where we get to the gripe about having :poo: before Bengali was adequately included