Two, during expansions, average wages tend to fall for the same reason. Remember, we only measure the wages of people who are working. More people are working during an expansion, but they are either less experienced or less valued. Even though there are fewer of them available, wages don't go up for them, because NO ONE WANTS TO HIRE THEM. They'd rather poach a more skilled worker from another company.
"Many geeks can tell you stories of how they and a few like-minded companions formed a small community that achieved something great, only to have it taken over by popular loudmouths who considered that greatness theirs by right of social station and kicked the geeks out by enforcing weirdo-hostile social norms. (Consider how many hackerspaces retain their original founders.) Having a community they built wrested away from them at the first signs of success is by now a signaling characteristic of weirdohood. We wouldnβt keep mentioning it if it didnβt keep happening."
However, HDL code alone is not sufficient for silicon. It is just one input for the design loops involving place-and-route, parameter-extraction, timing-analysis, etc.
By creating FOS CAD tools we are bridging the gap between HDL and layouts.
It's a similar situation to how gcc compilation produces binaries that contain bits and pieces from libgcc, except that the GCC license terms explicitly do *not* make the resulting binary subject to the GPLv3 (on the condition that you don't mix GCC with proprietary plugins). The proprietary silicon IP vendors are far more jealously guarding their designs.
For context, the Synopsys LA Β§2.2 and item 3 say:
> [ . . . ] when you are granted a license to any Implementation IP, you will have a nonexclusive right to:
> [ . . . ] distribute the Implementation IP in netlist or GDSII format as part of any of your Integrated Designs to any third party that provides foundry services to you, solely for the purpose of having that foundry make physical implementations of one or more of entire Integrated Designs of yours, as long as the third-party foundry is subject to confidentiality obligations regarding the Implementation IP that are no less restrictive than the confidentiality obligations in this agreement [ . . . ]
We are proud to announce the birth of the Free Silicon Foundation (https://f-si.org)!
We organize a conference in Paris, March 14-16 2019, to promote:
1. Free and Open Source (FOS) CAD tools for designing #VLSI circuits 2. the sharing of hardware designs 3. common standards 4. the freedom of users in the context of #silicon technology
The rootless containers concept now has its own home page at https://rootlesscontaine.rs/ and talks about more implementations or almost-implementations than just runc.