@saper I remember when Ficl came into existence to support the BSD boot loader effort. I was working for Hifn, Inc. at the time, circa 2001 or so, as I remember.
Notices by Vertigo (vertigo@mastodon.social), page 9
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 14:23:47 EDT Vertigo
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 14:22:29 EDT Vertigo
@saper The end of an era. It's amazing what having gobs and gobs of RAM at your command can let you do. ;)
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 13:56:12 EDT Vertigo
@June You're not missing much. It's basically a touch-optimized version of the earlier GMail interface, which means it's now uglier and more visually cluttered than ever before (at least for those of us who still use mice).
I'm considering just using my GMail account as a spam filter and forwarding all traffic elsewhere too. (I keep saying this, but it's a matter of motivation at this point.)
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 13:54:52 EDT Vertigo
I should clarify -- it is formally verified insofar as BMC checks are concerned. I still need to make it pass induction too. This is the __//HARD//__ part. >:/
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:56:05 EDT Vertigo
@haitch @ciaby @nonlinear @cstanhope @pointfree Might want to check out https://reconfigure.io/ then. This seems to be data-center optimized and it's a commercial venture, but they seem to support FPGA synthesis from Go code.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:51:43 EDT Vertigo
@fribbledom I miss large green open spaces. :(
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muesli (fribbledom@mastodon.social)'s status on Thursday, 18-Oct-2018 12:43:03 EDT muesli
Soak up the sun...
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:38:52 EDT Vertigo
Made excellent progress on my #Kestrel3 SIA core's receiver logic last night. It is formally verified to be correct, so I'm hoping I can find the time tonight to wrap the SIA core all together and implement local loopback logic. This will probably take all evening.
Then, hoping tomorrow evening, I can implement the Verilator code to drive the SIA core from the processor's point of view and verify in simulation that the core as a whole works.
Then, the SIA will be done done.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:28:08 EDT Vertigo
@pointfree @ciaby @nonlinear @cstanhope @haitch Look, you, I already retargeted my design from Xilinx to iCE40 once, I'm not doing it again. ;-P
Although, the presence of an FPAA intrigues me from a sound processing point of view. Imagine a computer that has basically a re-programmable Moog on a chip. I wonder how that could be used.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:10:51 EDT Vertigo
@pointfree @cstanhope @ciaby @nonlinear @haitch I need to refamiliarize myself with your work on this platform. It's been a while.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 12:08:17 EDT Vertigo
@haitch @ciaby @nonlinear @cstanhope @pointfree I mentioned MyHDL in the past; it has a similar set of features as Chisel and uses only Python.
Chisel 3 is, in my experience, *very* nice once it's installed; getting it installed is a royal nightmare.
MyHDL has one benefit over Chisel 3 though: it can elaborate your circuit in VHDL if you wanted. OTOH, Chisel is strongly typed.
DISCLAIMER: I've not used MyHDL yet, but would like to soon. Half-way tempted to write KCP53010 in it.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 00:59:14 EDT Vertigo
TIL: Effable does not mean fuckable. It means, literally, able to be described in words.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 00:37:28 EDT Vertigo
The frequency with which she's falling ill has me terribly worried. I strongly urged her to see her doctor and to make sure to tell them that this is the 3rd time this year with consistent symptoms.
I don't know what else can be done at this point.
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Vertigo (vertigo@mastodon.social)'s status on Thursday, 18-Oct-2018 00:36:35 EDT Vertigo
There is nothing worse than having a poor day of productivity at work, then coming home to your significant other sick, with a terrible chest cough, for the third time this year. Poor appetite, unable to speak, total head congestion. The only difference this time versus the last two is she has no fever.
It's absolutely heart-wrenching. I want to help so much, but I just can't.
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Vertigo (vertigo@mastodon.social)'s status on Wednesday, 17-Oct-2018 23:01:02 EDT Vertigo
@djsundog @aschmitz If sufficiently drunk, does the Smalltalk acquire a bit of a Lisp?
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Jason Nishiyama (evilscientistca@octodon.social)'s status on Wednesday, 17-Oct-2018 22:54:15 EDT Jason Nishiyama
M97 is a planetary nebula in Ursa Major. It is located near the lower pointer star Merak. As a planetary nebula it is the last phase of death of a intermediate to low mass (7 to 1 solar mass) star before the star becomes a white dwarf. #astrophoto
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Vertigo (vertigo@mastodon.social)'s status on Wednesday, 17-Oct-2018 22:50:52 EDT Vertigo
@suetanvil @crc @ckeen @yogthos @jasper Thank you for sharing!
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Vertigo (vertigo@mastodon.social)'s status on Wednesday, 17-Oct-2018 22:50:43 EDT Vertigo
@suetanvil @crc @ckeen @yogthos @jasper Nice!! I will be studying this code in the future.
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Vertigo (vertigo@mastodon.social)'s status on Wednesday, 17-Oct-2018 21:48:05 EDT Vertigo
@the_gayest_doggo Good call! Thanks!! I was unaware of this song/album.
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Vertigo (vertigo@mastodon.social)'s status on Saturday, 29-Sep-2018 11:09:20 EDT Vertigo
@djsundog @haiku Many years ago, I tried to become a contributor to the Haiku project. But, I couldn't -- the development tools just wouldn't compile for me, and plus, it's *all* in C++. (BeOS kernel and userland were always in C++; this was back in the Taligent days, remember!)
C++ is poison to me, but I'm happy that others are capable of grokking it and have worked to make a public beta available. Kudos and congratulations!!